RTL Integration Engineer
|Job Title:||RTL Integration Engineer|
|Job Published:||March 06, 2021 11:54|
Participate in RTL Top-level assembly and triage of GPU designs Plan, create and execute all RTL deliveries to physical design and SoC teams Take part in complex codeline management, supporting multiple products & chips Support integrating IP & design libraries Drive improvements and automation to frontend design flow - synthesis, CDC/RDC, LINT, etc Work closely with other teams to support design integration
Previous experience with logic design
Proficiency in System Verilog, scripting languages (Perl/Ruby/Python/Tcl), programming languages (C, C++), and revision control systems
Experience with synthesis, CDC and LINT tools
Understanding of physical design and design for test (DFT)
Ability to work well in a team and be productive under aggressive schedules, BSc/MSc/BEng/MEng/PhD in related field
Additional Requirements Additional Requirements
Some international travel required.
We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. The RTL Design team at the UK GPU Design Centre works on complex, large-scale GPU related projects. We partner with our graphics architecture, functional verification, and physical design teams to deliver high quality graphics IP in order to meet performance, feature, timing, area, and power goals.
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